defence exam Agniveer Vayu Group X & XY Mock Test 01/2026 Physics Semiconductors Digital Electronics and Logic Gates
\(\begin{array}{l|l|l} \mathrm{A} & \mathrm{~B} & \mathrm{Y} \\ \hline 0 & 0 & 1 \\ 0 & 1 & 1 \\ 1 & 0 & 0 \\ 1 & 1 & 1 \end{array}\)
To obtain the given truth table, following logic gate should be placed at G :
1
NOR Gate
2
AND Gate
3
NAND Gate
4
OR Gate