engineering recuitment ISRO Scientist Computer Science Mock Test Digital Logic Sequential Circuits Flip-Flop
The next state table of a 2-bit saturating up-counter is given below.
|
Q1 |
Q0 |
\({Q_{1}^{+}}\) |
\({Q_{0}^{+}}\) |
|
0 |
0 |
0 |
1 |
|
0 |
1 |
1 |
0 |
|
1 |
0 |
1 |
1 |
|
1 |
1 |
1 |
1 |
The counter is built as a synchronous sequential circuit using T flip-flops. The expressions for T1 and T0 are
1
T1 = Q1Q0, T0 = Q̅1Q̅0
2
T1 = Q̅1Q0, T0 = Q̅1 + Q̅0
3
T1 = Q1 + Q0, T0 = Q̅1 + Q̅0
4
T1 = Q̅1Q0, T0 = Q1 + Q0