engineering recuitment NIC NIELIT Scientist B 2023 Mock Test Digital Electronics Combinational Circuits De-Multiplexer
The combinational circuit shown in the below figure has the function. When selector input ‘s’ is high the circuit is to detect if one of the data lines has logic ‘1’ and no more than one data line is having logic ‘1’, when selector input ‘S’ is low, the circuit will output ‘0’, regardless of what is on the data lines. The logic of output Y is
1
S (D1 + D2 + D3)
2
\(S\;\left( {{{\bar D}_1} + \;{D_2}\; + \;{D_3}} \right)\)
3
\(\bar S\;\left( {{D_1}\; + \;{D_2}} \right) + S{D_3}\)
4
\(\left( {{D_1}\; + \;{D_3}} \right) + \bar S\;{D_2}\)