The mod-5 counter shown in figure counts through states 000, 001, 010, 011, and 100. The propagation delay of the flip flop and the logic gates are 20 ns and 10 ns respectively.

Which of the following statements is/are true?

1
The logic gate can be an AND or an OR gate.
2
Lockout condition will occur if the initial state is 101.
3
The maximum frequency for the counter to operate properly is 0.02 GHz
4
The maximum frequency for the counter to operate properly is 0.014 GHz

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