engineering recuitment GATE EE 2023-24 Test Series Control Systems Signal Flow Graph and Block Diagram Block Diagram Reduction Using Signal Flow Graph
For the block diagram shown below, C1(s) for the inputs R1(s) and R2(s) will be
1
\(\frac{{{G_1}{R_1}\left( s \right) + {G_2}{G_3}{G_4}{R_2}\left( s \right)}}{{1 + {G_1}{G_2}{G_3}{G_4}}}\)
2
\(\frac{{{G_1}{G_4}{R_1}\left( s \right) + {G_2}{G_3}{G_4}{R_2}\left( s \right)}}{{1 + {G_1}{G_2}{G_3}{G_4}}}\)
3
\(\frac{{{G_1}{R_1}\left( s \right) + {G_1}{G_3}{G_4}{R_2}\left( s \right)}}{{1 + {G_1}{G_2}{G_3}{G_4}}}\)
4
\(\frac{{{G_1}{R_1}\left( s \right) - {G_2}{G_3}{G_4}{R_2}\left( s \right)}}{{1 - {G_1}{G_2}{G_3}{G_4}}}\)