engineering recuitment GATE ECE 2023-24 Test Series Digital Electronics Combinational Circuits Multiplexer
For the circuit shown in the following figure I0 - I3 are inputs to the 4 : 1 multiplexer. A(MSB) and B(LSB) are control bits. The output Z can be represented by:
1
ABC + AC̅D + A̅BD + A̅BC
2
AC + AB̅D + A̅BD + A̅B̅C̅
3
AB̅C + A̅BD + A̅BC + ACD̅
4
ABC + ABD̅