engineering recuitment GATE ECE 2023-24 Test Series Digital Electronics Sequential Circuits Synchronous Counters
Assume that all the digital gates in the circuit shown in the figure are ideal, the resistor R = 10 kΩ, and the supply voltage is 5 V. The D flip-flops D1, D2, D3, D4, and D5 are initialized with logic values 0, 1, 0, 1, and 0 respectively. The clock has a 30% duty cycle.
The average power dissipated (in mW) in the resistor R is ________
Enter numerical value using the virtual keypad. Round off where necessary.