engineering recuitment GATE ECE 2023-24 Test Series Digital Electronics Sequential Circuits Asynchronous Counters
Consider the circuit using T-flip flops given below. Intially all flip flops were cleared.
|
F.F. |
Prop. delay |
|
Z Y X |
1 μsec 2 μsec 3 μsec |
|
NAND |
4 μsec |
The maximum clock frequency that can be applied is ______ kHz. (up to two decimal places)
Enter numerical value using the virtual keypad. Round off where necessary.