engineering recuitment GATE ECE 2023-24 Test Series Digital Electronics Combinational Circuits Binary Adders
Consider a 4 bit ripple carry adder. Each full adder is implemented using a 3 input exor gate, three 2 input AND gates and one 3 input or gate. Consider the delay of 3 input exor gate to be 3 n-sec, the delay of each 2 input AND gate to be 1 nsec and the delay of each 3 input or gate to be 1 nsec. The total time taken by the 4 bit ripple carry adder to perform successful addition operation is ________.
Enter numerical value using the virtual keypad. Round off where necessary.