engineering recuitment GATE ECE 2023-24 Test Series Digital Electronics Sequential Circuits Finite State Machines
A finite state machine with 4 possible states as 00, 01, 10, and 11 are implemented using two D Flip flops (QA is the MSB and QB is the LSB). The FSM is initialized to states 00, and the input x is constant throughout the operation.
Which of the following statements is/are true?
1
The FSM produces all possible states when x is 0.
2
The FSM produces all possible states when x is 1.
3
The FSM produces 3 possible states when x is 0.
4
The FSM produces 2 possible states when x is 1.