For the circuit shown in the figure, the switch ā€˜S’ is closed at t = 0. Assuming diodes D1 and D2 to be ideal, load resistance to be infinite and initial capacitor voltages to be zero. The steady-state voltage across capacitor C1 and C2 will be

1
V01 = 10 V, V02 = 5V
2
V01 = 10 V, V02 = -5V
3
V01 = 5 V, V02 = 10 V
4
V01 = 5 V, V02 = -10V

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