engineering recuitment GATE CSE 2023-24 Test Series Computer Organization and Architecture Memory Management Memory Hierarchy
Consider two level memory hierarchy L1 (cache memory) access time is ‘C’ nanosecond and L2 (main memory) with the access time is ‘M’ nanosecond. It is found the 60% of the memory requests are read requests and remaining all are write requests. The hit ratio of read operation is 'H' and that of write operation is 1. What is the average memory access time when the cache is designed with write through protocol?
[MM access time is greater than the CM]
1
M (1 - 0.6H) + 0.6HC
2
0.6(H + C + M)
3
M + 0.6H(C - M)
4
0.6H + 0.6(C + M)