engineering recuitment GATE CSE 2023-24 Test Series Computer Organization and Architecture Memory Management Memory Hierarchy
If T1 and T2 are average access time of upper level memory M1 and lower level memory M2 in a 2 – level memory hierarchy and H is the hit rate in M1, then the overall average access time is given by ____, assuming that in case of a miss in M1, a block is first copied from M2 to M1 and then accessed from M1:
1
T1 + (1 – H) × T2
2
(T1 + T2) (1 – H)
3
HT1 + (1 – H) ×(T1 + T2)
4
(1 – H) × T1 + T2