engineering recuitment HPCL Junior Executive 2025 Mock Test Digital Logic Combinational Circuits Multiplexer
The output f of the 4-to-1 MUX is shown in the figure. The function, f, is given as
1
x̅ y̅ + xy
2
x̅ y + x y̅
3
x + y
4
x̅ + y̅
The output f of the 4-to-1 MUX is shown in the figure. The function, f, is given as