railway RRB JE (CBT I + CBT II) Mock Test 2024 Digital Logic Sequential Circuits Flip-Flop

In a JK flipflop, J and K inputs are set to logic 1, the output Q(0) will be _______ when Q(-1) is _________.

1
0, 0
2
1, 1
3
undefined, 1
4
1, 0
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