railway RRB JE (CBT I + CBT II) Mock Test 2024 Digital Electronics Sequential Circuits Memory Elements
In the following sequential circuit, the sequence followed by A and B on rising edge of CLK after reset is de-asserted is
1
AB = 10, 11, 00, 10, 11, …
2
AB = 10, 01, 00, 10, …
3
AB = 10, 00, 01, 10, 00, …
4
AB = 11, 01, 00, 10, 11, …