Teaching Haryana (HPSC) Assistant Professor Mock Test 2025 Computer Organization and Architecture I/O Interface Modes of Data Transfer
Which of the following statement is False in case of DMA mode?
1
Bus grant signal is activated by the DMA controller to inform the CPU that the buses are in high impedance state.
2
DMA controller has 3 registers.
3
The controller raises an interrupt signal to notify the processor that the transfer was complete.
4
None of the above
5
Question Not Attempted