Teaching UGC NET Mock Test Series 2025 (Paper 1 & 2) Computer Organization and Architecture Machine Instructions and Addressing Modes
A micro-instruction format has micro-ops field which is divided into three subfields F1, F2, F3 each having seven distinct micro-operations, condition field CD for four status bits, branch field BR having four options used in conjunction with address field ADF. The address space is of 128 memory locations. The size of micro-instruction is :
1
17 bits
2
20 bits
3
24 bits
4
32 bits