engineering recuitment GATE IN Test Series 2023-24 Mock Test Digital Electronics Logic Gates and Boolean Algebra Logic Gates
Suppose we are given the faulty circuit in Figure a) where the output of NAND gate N2 is known to have a stuck-at fault. However, we do not know whether it is a stuck-at 1 fault or a stuck-at 0 fault. Further, as illustrated in Figure b), suppose that we have access only to the inputs A, B, and C, and the output Z. In other words, we are unable to directly observe the output X of the faulty NAND gate N2.
Which of the following combination of Inputs can be applied to determine the struck logic.
I. A = 0 B = 0 C = 1
II. A = 0 B = 1 C = 0
III. A = 1 B = 0 C = 0
IV. A = 1 B = 1 C = 11
I only
2
I and II only
3
II and III only
4
I, II and IV only