Consider a system in which the size of the physical address space of a processor is 2m bytes. The capacity of cache memory is S words. The size of the block is 2b words.  The word length is 2w bytes. The length of the tag field in bits for a 2way set-associative cache memory is _____.

1
m + K – log2S
2
m – w – C + K + log2S
3
m – w + K – log2S
4
m – w – b + K + log2S

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