engineering recuitment GATE CSE 2023-24 Test Series Computer Organization and Architecture Memory Management Memory Hierarchy
Consider a system with 2 level cache in the order L1 followed by L2. Let the access time of L1 cache be y and the access time of L2 and Main Memory be 15 ns and 1 μs respectively. The miss rate of L1 and L2 is 10% and 20% respectively. If word is not found in caches, then it is present in Main Memory. If the average access time is 25 ns, then y is equal to _____.
1
4 ns
2
3.5 ns
3
3 ns
4
2 ns