Consider a MUX network shown below:
Which of the following statements is/are true?
1
The output Z1 of MUX 2 will be Z1 = Z0 c + Z̅0 c̅
2
The output Z2 of MUX 3 will be Z2 = b Z0 + c Z̅0
3
This circuit acts as a Full subtractor
4
This circuit acts as a Full Adder