A processor takes 24 cycles to complete an instruction 1 with frequency 4 GHz. The corresponding pipelined uses 6 stages with the execution times of 4, 3, 6, 2, 5, and 2 cycles respectively with frequency 2 GHz. What is the asymptotic speedup assuming that a very large number of instructions are to be executed?
1
2
2
2.5
3
3
4
3.5