A circuit consists of two clocked JK flip-flops connected as follows: \({J_0} = {K_0} = {\overline Q _1}\), \({J_1} = {Q_0}\) and \({K_1} = {\overline Q _0}\).
Each flip-flop receives the clock input simultaneously. The circuit acts as a
1
Counter of mod 3
2
Counter of mod 4
3
shift-left register
4
Shift-right register