engineering recuitment HPCL Junior Executive 2025 Mock Test Digital Electronics Logic Gates and Boolean Algebra Laws of Boolean Algebra
The output Y of the circuit shown in the figure is
1
\(\overline{A + B + C} + \overline{DE}\)
2
\(\overline{ABC} + D + E\)
3
\(ABC + \overline{D + E}\)
4
ABC + D + E