railway RRB JE (CBT I + CBT II) Mock Test 2024 Digital Logic Sequential Circuits Flip-Flop

A mod-3 counter is constructed using J-K flip flops each having a propagation delay of 50 nsec. The maximum frequency of clock that can be applied to the input signal is:

1

2 MHZ

2

4.5 MHZ

3

10 MHZ

4

5 MHZ

Share: WhatsApp Telegram X

Sponsored

hivanix.in

This quiz is brought to you by hivanix.in

🌐 Web App Development

Other Tools: chatwiz.hivanix.in mmspace.hivanix.in unogame.hivanix.in

Quick Navigation

Home

Subjects

Chapters