railway RRB ALP (CBT 1 + CBT 2 + CBAT) Mock Test Series 2025 (New) Digital Electronics Sequential Circuits
In parallel shift register and serial shift register, the number of clocks pulses required to enter a byte is _________ and _______ respectively.
1
1 and 1
2
1 and 8
3
8 and 8
4
8 and 1