The output logic ‘F’ of the CMOS circuit shown below is

1
\(\overline {A\left( {D + E} \right) + BC}\)
2
\(\overline {\left( {A + DE} \right) + \left( {B + C} \right)}\)
3
\(\overline {A\left( {D + E} \right) + \left( {B + C} \right)}\)
4
\(\overline {\left( {A + DE} \right) + \left( {BC} \right)}\)

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