Consider that following program segment for a hypothetical CPU having two user registers R1 and R2.

Instruction	Operation	Instruction size (in words)
MOV R1, M[2500]	R1 ← Memory[2500]	2
MOV R2,  #10	R2 ← R2 + 10	1
ADD R1, R2	R1 ← R1 + R2	2
HALT	Machine halts	1

Consider that the memory is byte addressable with size 64 bits and program has been loaded from memory location 2000(decimal). If an interrupt occurs while the CPU has been halted after executing the HALT instruction, the return address (in decimal) saved in the stack.