An instruction is stored at location 500 with its address field at location 501. The address field has the value 400. A processor register R1 contains the number 200. Match the addressing mode (List-I) given below with effective address (List-II) for the given instruction.
|
|
List I |
|
List II |
|
a. |
Direct |
i. |
200 |
|
b. |
Register indirect |
ii. |
902 |
|
c. |
Index with R1 as the index register |
iii. |
400 |
|
d. |
Relative |
iv. |
600 |
Choose the correct option from those given below:
1
a – iii, b – i, c – iv, d - ii
2
a – i, b – ii, c – iii, d - iv
3
a – iv, b – ii, c – iii, d - i
4
a – iv, b – iii, c – ii, d - i